Senior Asic/fpga Engineer
Zeropoint Technologies AB / Elektronikjobb / Göteborg
2026-06-27
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The role
You'll own complex RTL development end-to-end, from architectural trade-offs and early exploration through synthesis, timing closure, and FPGA-based validation. Working closely with software teams, you'll adapt and harden ASIC-targeted designs for FPGA implementation, analyze implementation results, and drive measurable improvements in performance, power, and area. This is a high-ownership position with real impact on the efficiency of computing hardware.
What you bring
Data compression in hardware — hands-on depth with compression algorithms applied in an RTL or hardware-adjacent context, not just theoretical familiarity.
Production-grade SystemVerilog — you write and maintain synthesizable RTL at a level that goes directly into real designs, not just simulations.
Synthesis & timing closure — solid, practical experience with RTL synthesis, low-power design techniques, and meeting PPA targets across technology nodes.
On-chip protocols — practical working knowledge of CHI, AXI, or comparable memory and interconnect interface standards.
Scripting & automation — Tcl and Python used in real design, verification, or automation workflows.
C for hardware modeling — C used for validation, behavioral modeling, or internal tooling alongside HDL work.
How we work
Close collaboration between hardware and software — you're the technical bridge, not a handoff point.
Research-driven environment: ambiguity is expected, and so is the judgment to navigate it toward robust outcomes.
Knowledge-sharing is part of the job — both contributing to and building up team capability over time.
Core values: creativity, innovation, and teamwork.
Så ansöker du Sista dag att ansöka är 2026-07-08
E-post:
jobs@zptcorp.com Omfattning Detta är ett heltidsjobb.
Arbetsgivare ZeroPoint Technologies AB (org.nr 559010-8220)
Arbetsplats Zeropoint Technologies AB
Kontakt COO
Petronella Torgersson
petronella.torgersson@zptcorp.com Jobbnummer 9982114