Design Engineer- Sta/ Synthesis (asic)

Swedium Global Services AB / Datajobb / Stockholm
2019-03-19
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Required Skills and Experience

Experience in ASIC, SoC or FPGA logic design
At least 6 years of related experience
Expert in VHDL/Verilog/System Verilog
Excellent knowledge of DC/PC/ICC1/ICC2
Synthesis experience for Timing/Area/Power closure
multi-Core CPU Architecture Knowledge
Experience in using TCL/Python/Perl/etc....
Have worked with Environment like Linux, ClearCase, LSF

Swedium Global is looking for experienced ASIC Design Engineer (STA) for its project in Sweden. Work location will be in Sweden itself.

Swedium Global is the growing System Engineering and Solution Company, offers services like Engineering R&D and Services to clients across the globe for onsite and offshore business model. We provide industry solutions to our customer through our dedicated development center in Bangalore (India) and Stockholm (Sweden).

www.swediumglobal.com

www.swediumglobal.com

Publiceringsdatum
2019-03-19

Så ansöker du
Sista dag att ansöka är 2019-04-25

Företag
Swedium Global Services AB

Adress
Swedium Global Services AB
Karlaplan 10
11520 Stockholm

Kontorsadress
Karlaplan 10

Jobbnummer
4678932

Observera att sista ansökningsdag har passerat.

                   

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