We are now looking for an experienced Verification Engineer works primarily in the verification of complex SOC. Candidate should have 8 plus years of relevant experience in verification and should match below requirements. Requirements/Skills: Have knowledge of ASIC/FPGA development in the following areas: • Expertise in developing testbenches using SV-UVM. • Expertise in making verification plan • Integration of 3rd party VIP in the existing UVM environment. • Knowledge of verification closure by achieving 100% code and functional coverage. • Knowledge of Ethernet protocol is a plus. • Knowledge in System-C • Knowledge in Specman-e is a plus. • Experience of working in agile way.