Expereince level :3 to 10 years. Hands on in ASIC/FPGA level Design Verification Using System Verilog /UVM Experience in basic Industry tools debug and simulation Good knowledge of ARM subsystem, AMBA bus Familiar with DSP subsystems and high speed interfaces (e.g. SERDES, GigE, 10GE) Ability to lead & motivate a team of Engineer Experience in Automotive industry would be plus with LIDAR protocol knowledge.